![]() ![]() The scaling of 3D NAND flash has exacerbated this specific defect. Micromasking or needle-like defects are seen during any high aspect ratio etch process, such as those used in producing DRAM, NAND, and power devices. In addition, the carbon hardmask used in 3D NAND is conductive and should be removed as it can also be an arcing source. Therefore, a proper bevel etch is needed after metal deposition to remove any future possibility of destructive arcing during RIE. This charge buildup leads to the ejection of metallic particles from the bevel area into the active area of the wafer, causing different types of shorts and significantly impacting yield. These residual particles create undesirable interfaces between different materials at varying locations on the wafer, causing a charge buildup at the metallic interfaces where metal can be explosively vaporized. Multiple layers of thin interlayer dielectric (ILD), metal barrier (TiN) and conductor films (W) can form at the wafer edge with different thicknesses due to incomplete removal of residual particles. ![]() The arcing damage tends to occur near metallization lines, which act as a ground path to charged areas in the dielectric insulating layer. ![]() Arcing damage can occur due to unequal charge distribution in low dielectric insulating layers during high aspect ratio RIE. The problem of arcing or electrical discharge of the plasma is particularly noticeable in RIE processes. There are process steps that require reactive ion etching and tungsten (W) fill where arcing can occur. Arcing :Īrcing is the electrical breakdown of a gas that produces a prolonged electrical discharge. Peeling can also occur in 3D NAND as the carbon deposition, especially with memory hole and staircase patterning, is very thick and has potential to break off and become a peeling source. This is a severe defect since these particles can potentially land on the center of the wafer and increase yield loss. Wet etch processes can also attack the thin surfaces on the wafer edge, resulting in delamination that creates more particles. If the blisters are broken by wafer handling, additional particles can be created. This can cause blisters to form and these blisters can continue to grow further through thermal expansion. Annealing steps will cause the film adhesion to degrade as the material properties change during the heating and cooling process. Therefore, the remaining stacked films can have interfacial stress that prevents them from adhering properly. Since subsequent dry etches are not isotropic, they can remove some stacks at the edge but not completely around the bevel or apex region. The films that are deposited during semiconductor manufacturing wrap around the edge, bevel area, and apex. Types of Defects Peeling (or Delamination) or Particle Defects:ĭuring the semiconductor manufacturing process, there are many ways that peeling or particle contamination can occur. This accumulation of particles and materials can lead to peeling or delamination of the wafer, with subsequent yield loss. During etching, some of these materials may be improperly removed at the edge and some of the residue particles or etching polymer can land back on the bevel or backside of the wafer. At the edge area between the flat surface and the curved region of the wafer, the materials are deposited with non-uniform thickness and etched at various rates. Manufacturing standards have required polishing of the bevel region to prevent wafer cracking and chipping. Figure 1: Various areas of the wafer beyond the active or patterned area ![]()
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